1. Field of the Invention
The present invention relates generally to packaging components for semi-conductor devices and methods for the manufacture thereof, and more particularly to a package comprising a cap and substrate and having a mismatch in the coefficients of thermal expansion between the cap and substrate.
2. Brief Description of Related Art
In a semi-conductor chip package design, consideration must be given to heat removal from the package as well as to protecting devices in the package from the environment. Generally, in a semi-conductor chip package there is at least one semi-conductor chip, and a package component that acts as a heat sink to prevent overheating and possible resulting failure of the semi-conductor chips. In a number of designs the semi-conductor chip package heat dissipation path includes a cap that covers the semi-conductor chips. The cap must be attached to the package in some manner, and the cap is usually sealed to the substrate to protect the device and substrate metallurgy from the environment. In higher power applications, heat sinks may be attached to the back of the cap, or the cap and heat sink can be combined into a common structure.
The method of sealing the cap to the substrate varies and may be done by various means known to those experienced in the art. The seal between the cap and substrate must be flexible since the substrate and cap heat and expand in use. If the cap and substrate are of different materials or have different heating rates, that is if the different materials have different thermal coefficients of expansion (TCE), then there can be strain on the seal as heating and cooling occur. If the strain on the seal is above a threshold value then the seal will fatigue and will eventually fail. For that reason, systems having a TCE match between the cap and substrate, or systems using c-rings and seal frames if there is a TCE mismatch, have been favored for hermetic applications. Compliant adhesives have been used for large TCE mismatches for non-hermetic applications. The following references illustrate the state of the pertinent art.
U.S. Pat. No. 5,052,481 describes a system that uses high conductivity materials in a large water cooled module where a cap has finned interconnecting devices to link it thermally with the back of the chips. A hermetic seal is obtained through the use of a C-ring.
U.S. Pat. No. 5,188,280 describes a method of bonding metals and an apparatus for bonding metals which include irradiating the metals with an atomic beam and pressing the metals together in an inert gas atmosphere.
U.S. Pat. No. 5,100,740 describes a bonding method requiring that the TCE of the cap and substrate be matched. The cap comprises a symmetric, three layered structure where each layer is an isomorphic metal. The cap is either a Cu--W--Cu or Cu--Mo--Cu structure.
U.S. Pat. No. 4,656,499 describes a system that uses two solder seals to create a hermetic package. The seal is made up of two components; a seal frame is soldered to the substrate and a cap is soldered to the seal frame. The cap may be made from a material with a high thermal conductivity but both the seal frame and cap must be selected from materials that closely match the TCE of the substrate.
U.S. Pat. No. 5,168,344 describes a module that uses a seal frame with a TCE similar to that of the substrate to create a TCE match in a system that would otherwise have a TCE mismatch between the high thermal conductivity cap made of copper or aluminum and the substrate.
U.S. Pat. No. 5,103,292 describes modules where a metal cap of any metal or alloy is joined by means of an epoxy to a substrate of the same or different material. This requires the TCE of the frame and cap to be similar.
U.S. Pat. No. 5,086,333 describes a system comprising a substrate formed by infiltrating molten copper into a sintered compound of tungsten or molybdenum.
U.S. Pat. No. 5,099,310 describes a TCE system comprising a substrate formed by infiltrating molten copper into a pressed and sintered compound of tungsten and/or molybdenum and an enclosure base unit formed from Al.sub.2 O.sub.3.
U.S. Pat. No. 4,680,618 describes a TCE system which uses a ceramic substrate and a cap formed by impregnating molten copper with porous tungsten or molybdenum.
Low cost hermetic sealing methods and structures for semi-conductor packages are advantageous. However, known methods for producing low cost hermetically sealed semi-conductor packages require a TCE match between the cap and substrate. Other available methods of hermetically sealing high performance semi-conductor packages require additional system hardware.
There are numerous disadvantages that have been traditionally associated with TCE mismatched component sealing; among those disadvantages are lost space on the substrate, additional hardware or tooling, and increased production time. Traditional low cost hermetic seal forming materials such as solder, and certain low cost non-hermetic seal forming materials such as epoxy, require the TCE of the cap be similar to the TCE of the substrate, meaning that the cap and substrate heat and expand at the same rate. If there is a TCE mismatch in the system, which results in differing rates and amounts of expansion, then additional hardware in the form of c-rings or seal frames may be necessary if hermeticity was sought.
Thus, there is a need for a system which provides low cost sealing methods and TCE mismatched component parts which accommodate non-isothermal packages and the mechanical requirements of the seal.